Virtual Wires Pictures
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The Virtual Wires board
The hardware building block of the Virtual Wires system is an FPGA - based emulation board which has been designed to be inexpensive to manufacture and easy to build. Each board contains six layers, uses only through-hole devices, and is ten inches square in size. At the present time we use a SparcStation 10 as the host interface for this system although the emulation board may be reconfigured to interface to virtually any host computer.
This board, designed by Russ Tessier, holds 16 Xilinx FPGAs, with 84 pin PLCC pinouts, which are connected in a two dimensional grid. The 16 FPGAs contain user netlist information. A 17th Xilinx FPGA of the same type in the upper right corner is available for communications with the host via an sbus interface. Work is still in progress in that area. Currently, we use a serial interface which communicates with the board through a Motorola MC68HC11 microprocessor. Connectors on all 4 sides of the board allow for expansion in a two - dimensional mesh topology.
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In-Circuit emulation of Sparcle
An Alewife VME board is shown in the background. Each Alewife node has a slightly modified SPARC microprocessor called Sparcle. In the above picture, the Sparcle processor has been replaced with a pod intefacing into the Sparcle 207 pin PGA socket (in the upper-left corner). This pod connects to the virtual wires logic emulation system via three edge connectors on a virtual wires board. Two boards are connected together and demonstrate the two - dimensional mesh expansion capability of the system. Our initial efforts allowed us to emulate Sparcle (about 18K gates) "in-circuit" as shown at 180 KHz.
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